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Assistant Professor

Faculty and Staff Profiles

Samah Saeed

Assistant Professor

School/Division
Department
Office
ST 640
Building: 
Steinman Hall
Phone Number: 
(212) 650-7046
Fax: 
(212) 650-8249
Email: 
ssaeed@ccny.cuny.edu
Photograph of Prof. Samah Saeed
Heading: 
Education
Description: 
  • Ph.D. in Computer Science, New York University, Polytechnic School of Engineering, 2015.
  • M.S. in Computer Science, Kuwait University, College of Science, 2010.
  • B.S. in Computer Science, Kuwait University, College of Science, 2008.
Heading: 
Research Interests
Description: 
  • Computer Aided Design: Design for Test, Design for Trust, Design for Secure Test.
  • Hardware Security.
  • Security of Emerging Technology (Nano Technology, Reversible and Quantum Computing).
Heading: 
Publications
Description: 

Selected Publications

Journal Publications

j10. Kanad Basu, Samah Mohamed Saeed, Pilato Christian, Mohammad Ashraf, Mohammad Thari Nabeel, Krishnendu Chakrabarty, and Ramesh Karri, “Is CAD Bad,” Submitted to ACM Transaction on Design Automation of Electronic Systems.  
j9. Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Ramesh Karri, and Robert Will, “Can an IP/IC Pirate Identify the Synthesis Approach of a Reversible Circuit?,” submitted to Journal on Emerging Technologies in Computing Systems, 2018.
j8.  Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner. Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri, “On the Difficulty of Inserting Trojans in Reversible Computing Architectures,” Accepted at IEEE Transactions on Emerging Topics in Computing, 2018.
j7. Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, “Timing Attack and Countermeasure on NEMS Relay Based Design of Block Ciphers,” IEEE Transactions on Emerging Topics in Computing, 2017.
J6. Samah Mohamed Saeed and Ozgur Sinanoglu, “A comprehensive Design-for-Test Infrastructure in the Context of Security- Critical Applications,” IEEE Design & Test, vol. 34, no. 1, pp. 57-64, Feb. 2017.
j5. Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, and Ramesh Karri, “Novel Test- Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures,” Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, issue 5, pp. 808-821, May. 2015.
j4. Samah Mohamed Saeed and Ozgur Sinanoglu, “DfT Support for Launch and Capture Power Reduction in Launch-Off-Shift and Launch-Off-Capture Testing,” IEEE Transactions on Very Large Scale Integration Systems, vol. 22, issue 3, pp. 516-521, Mar. 2014.
j3. Samah Mohamed Saeed, Ozgur Sinanoglu, and Sobeeh Almukhaizim, “Predictive Techniques for Projecting Test Data Compression,” IEEE Transactions on Very Large Scale Integration Systems, vol.21, no.9, pp. 1762-1766, Sep. 2013.
 j2. Samah Mohamed Saeed and Ozgur Sinanoglu, “Expedited-Compact Architecture for Average Scan Power Reduction,” IEEE Design and Test of Computers, vol.30, no.3, pp.25- 33, Jun. 2013.
j1. Samah Mohamed Saeed and Ozgur Sinanoglu, “Multi-Modal Response Compaction Adaptive to X-Density Variation,” IET Computer and Digital Techniques, vol. 2, issue 6, pp. 69-77, Mar. 2012.
 

Conference Proceedings

c14. Samah Mohamed Saeed, Xiaotong Cui, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler and Ramesh Karri, “IP Piracy Assessment of Reversible Logic,” Accepted to International Conference On Computer Aided Design, 2018.
c13. Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Ramesh Karri, and Robert Wille, “Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks,” IEEE International Conference on Computer Design, USA, pp. 537–540, 2017.
c12. Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, and Ozgur Sinanoglu, “Thwarting Timing Attacks on NEMS Relay Based Designs,” IEEE VLSI Test Symposium, USA, pp. 1-4, 2016.
c11. Muhammad Yasin, Samah Mohamed Saeed, Jeyavijayan Rajendran, and Ozgur Sinanoglu,“Activation of Logic Encrypted Chips: Pre-Test or Post-Test?,” IEEE Design, Automation, And Test In Europe, Germany, pp. 139-144, 2016. 
c10. Samah Mohamed Saeed, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu, “Timing Attack on NEMS Relay Based Design of AES,” IFIP/IEEE International Conference on Very Large Scale Integration, USA, pp. 264-269, 2015. 
c9. Samah Mohamed Saeed and Ozgur Sinanoglu, “DfST: Design for Secure  Testability,”IEEE International Test Conference, USA, pp. 1-10, 2014.
c8. Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, and Ramesh Karri, “Novel Test- Mode-Only Scan Attack for Contemporary Scan Architectures,” IEEE International Test Conference, USA, pp. 1-8, 2014.
c7. Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, and Ramesh Karri, “New Scan Attacks Against State-of-the-art Countermeasures and DFT,” IEEE International Symposium on Hardware-Oriented Security and Trust, Arlington, USA, pp. 142-147, 2014.
c6. Abishek Ramdas, Samah Mohamed Saeed, and Ozgur Sinanoglu, “Slack Removal for Enhanced Reliability and Trust,” IEEE Design & Technology of Integrated Systems in Nanoscale Era, Santorini, Greece, pp. 1-4, 2014.
c5. Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, and Ramesh Karri, “New Scan- Based Attack Using Only the Test Mode,” IEEE International Conference on Very Large Scale Integration, Istanbul, Turkey, pp. 234-239, 2013.
c4. Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, and Ramesh Karri, “Scan Attack in the Presence of Mode-Reset Countermeasure,” IEEE International On-Line Testing Symposium, Crete, Greece, pp. 230-231, 2013.
c3. Samah Mohamed Saeed and Ozgur Sinanoglu, “DfT Support for Launch and Capture Power Reduction in Launch-Off-Capture Testing,” IEEE European Test Symposium, Annecy, France, pp. 1-6, 2012.
c2. Samah Mohamed Saeed and Ozgur Sinanoglu, “Expedited Response Compaction for Scan Power Reduction,” IEEE VLSI Test Symposium, Dana Point, CA, USA, pp. 40-45, 2011. (Best paper award)
c1. Samah Mohamed Saeed and Ozgur Sinanoglu, “XOR-Based Response Compactor Adaptive to X-Density Variation,” IEEE Asian Test Symposium, Shanghai, China, pp. 212- 217, 2010.
 

Book Chapter

b2. Samah Mohamed Saeed, Sk Subidh Ali, and Ozgur Sinanoglu, “Scan Design: Basics, Advancements and Vulnerabilities,” Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment, 2017.
b1. Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, and Ramesh Karri, “New Scan-Based Attack Using Only the Test Mode And An Input Corruption Countermeasure,” VLSI-SOC Springer Book Chapter, 2014.
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